Hybrid "multi-chip" microcircuits and integrated circuits often require bonding the backside of chips to a larger substrate together with forming electrical connections between the chips and substrate. In the past, wires were used to connect the conductive pads on the chips to conductive portions of the substrate. For each wire interconnection, two bonds must be made by a human operator and since many interconnections are employed between each chip and the substrate, bad bonds are occasionally produced. To improve reliability, a number of screening techniques have been developed including thermal cycling, centrifuging, high temperature burn in, and pull testing of each individual wire, the latter technique doubling the cost of the wire bonding operation which is in any case expensive and delicate to carry out since considerable care on the part of the operator is required. Ribbon wire bonding is more reliable than round wire bonding but is also very costly. The cost of wire bonding is high since each bond must usually be performed individually in sequence by a human operator. It is thus desirable to provide techniques for automating the production of reliable interconnections between chips and substrates as much as possible.
Beam-lead technology has had limited application since special circuit layouts must be used on the wafers from which the chips are cut in order to provide room for beam formation. Thus, this technology is not applicable to the vast majority of circuit layouts currently available. Additionally, beam-lead processing is complicated since costly photomasking steps are required. Furthermore, the beam-leads are fragile and create handling and shipping problems in addition to the difficulty of automating the attachment process.
The most recent alternative to wire bonding (spider bonding) is the "etched film on plastic carrier" technique which has a number of drawbacks including the need for the carrying out of several separate mechanical steps and the need for difficult and precise alignment during bonding.
Ultrasonic bump flip chips usually employ bumps formed on the chips by vacuum deposition through a metal mask or by photolithography. Ultrasonic waves produce the electrical connections between the chips and the substrates. In numerous cases, bond strengths of previously bonded chips are compromised during subsequent bonding operations. Additionally, the integrity of the multiplicity of bonds cannot be verified by optical inspection alone and non-destructive tests of shear strength often cause chipping of the semiconductor die. The shear strength testing of the bonds is non-selective in that the integrity of the particular bonds is not examined since the entire assembly is placed in shear. Chip breakage or crack propagation also is often the result of the considerable pressure applied to multiple bumped chips during bonding.
Solder bumps made of lead-tin solder are not truly metallurgically compatible for the formation of bonds with gold films which are almost universally employed for interconnecting chip devices. Lead-tin solder leaches gold out of these gold bearing films which can result in unreliable bond strengths. Furthermore, the formation of lead-tin solder joints requires the use of flux which can leave behind dangerous flux residues. Also, solder dams are required to restrict solder flow, complicating bonding pad construction. Additionally, complex processing involving two photolithographic steps is often employed.